IBM Unveils Dual-ISA Chips to Bridge Mainframe Workloads and Cloud Deployments
IBM has unveiled its next-generation Z and LinuxOne chips, which will combine dual instruction-set architecture (dual-ISA) to enable software designed for Z and Arm to run side by side on the same hardware.
This development aims to ease the challenge of bridging mainframe workloads and modern Arm-native cloud deployments, a critical issue for enterprises. The IBM Z and LinuxOne platforms currently handle 68% of the world's IT workloads.
The new processors will be built on a 2nm process and feature high productivity with strong energy efficiency. They can exceed 5.7 GHz for rapid data processing, with L2 cache at 36 MB, L3 cache at 432 MB, and L4 cache up to 3.5 GB.
Christian Zollin, an IBM representative, stated that 'IBM's next-generation chips will include dual instruction set architecture inside the core, allowing simultaneous execution of Z and Arm software.'