Nvidia Unveils Groq 3 LPX Architecture at Hot Chips 2026
Nvidia unveiled its Groq 3 LPX architecture at Hot Chips 2026, along with its first third-party inference benchmark. The company's VP of hardware, Igor Arsovski, presented the Groq 3 LPX rack's design and demonstrated a performance increase of roughly four times compared to the next-fastest public endpoint.
The Groq 3 LPX architecture is built on the LP30 chip, which Nvidia obtained through its $20 billion deal with Groq in December 2025. The LP30 carries approximately 500MB of on-die SRAM and no HBM, allowing a full LPX rack of 256 chips to hold 128GB of memory.
Nvidia is pitching the LPX rack as a decode co-processor bolted onto Vera Rubin NVL72 GPUs, with Rubin handling the compute-heavy prefill phase and building the KV cache while the LPUs generate output tokens. The company demonstrated three ways to divide the work: disaggregated prefill and decode; attention-FFN disaggregation; and external-draft speculative decoding.
Cerebras also presented its CS4 wafer-scale system at Hot Chips 2026, which chief system architect Jean-Philippe Fricker said runs up to 30 times faster than GPUs and doubles the token rate of the CS3 while carrying 10 times the token capacity. Cerebras has partnered with AMD Helios GPUs for prefill and its wafer-scale engines for decode.