ParityQC Releases Quantum Optimization Tool with Record-Breaking Efficiency

ParityQC has launched the Parity Twine Optimizer as a product through the IBM Qiskit Functions Catalog. The optimizer uses ParityQC's Parity Twine Compilation technology to reduce gate count, circuit depth and two-qubit gate overhead for quantum optimization problems.

The hardware-independent compiler supports different QPU topologies, including IBM Heron's heavy-hex and IBM Nighthawk's square-lattice architectures. This allows users to run larger optimization problems on current quantum hardware.

ParityQC's co-CEOs, Magdalena Hauser and Wolfgang Lechner, stated that the company is providing the quantum community with access to a tool with what they currently show to be the most efficient quantum compiler available for larger and more connected problems to run on real hardware.